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Field-programmable analog array

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A field-programmable analog array (FPAA) is an <a href="Integrated_circuit" title="Integrated circuit">integrated circuit device</a> containing computational <a href="Analog_signal" title="Analog signal">analog</a> blocks (CABs)<a href="#cite_note-1">[1]</a><a href="#cite_note-2">[2]</a> and interconnects between these blocks offering <a href="Field-programmability" title="Field-programmability">field-programmability</a>. Unlike their <a href="Digital_signal" title="Digital signal">digital</a> cousin, the <a href="Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a>, the devices tend to be more application driven than general purpose as they may be <a href="Current-mode_logic" title="Current-mode logic">current mode</a> or voltage mode devices. For voltage mode devices, each block usually contains an <a href="Operational_amplifier" title="Operational amplifier">operational amplifier</a> in combination with programmable configuration of passive components. The blocks can, for example, act as <a href="Analog_adder" class="mw-redirect" title="Analog adder">summers</a> or <a href="Integrator" title="Integrator">integrators</a>.

FPAAs usually operate in one of two modes: <a href="Discrete_time_and_continuous_time" title="Discrete time and continuous time">continuous time and discrete time</a>.

<ul><li>Discrete-time devices possess a <a href="Clock_signal" title="Clock signal">system sample clock</a>. In a <a href="Switched_capacitor" title="Switched capacitor">switched capacitor</a> design, all blocks sample their input signals with a <a href="Sample_and_hold" title="Sample and hold">sample and hold</a> circuit composed of a semiconductor switch and a capacitor. This feeds a programmable <a href="Operational_amplifier" title="Operational amplifier">op amp</a> section which can be routed to a number of other blocks. This design requires more complex <a href="Semiconductor" title="Semiconductor">semiconductor</a> construction. An alternative, switched-current design, offers simpler construction and does not require the input capacitor, but can be less accurate, and has lower <a href="Fan-out" title="Fan-out">fan-out</a> - it can drive only one following block. Both discrete-time device types must compensate for switching noise, aliasing at the system sample rate, and sample-rate limited bandwidth, during the design phase.</li>

<li>Continuous-time devices work more like an array of <a href="Transistor" title="Transistor">transistors</a> or op amps which can operate at their full <a href="Bandwidth_(signal_processing)" title="Bandwidth (signal processing)">bandwidth</a>. The components are connected in a particular arrangement through a configurable array of switches. During <a href="Circuit_design" title="Circuit design">circuit design</a>, the switch matrix's <a href="Parasitic_element_(electrical_networks)" class="mw-redirect" title="Parasitic element (electrical networks)">parasitic</a> inductance, capacitance and <a href="Noise_(signal_processing)" title="Noise (signal processing)">noise</a> contributions must be taken into account.</li></ul>

Currently there are very few manufactures of FPAAs. On-chip resources are still very limited when compared to that of an FPGA. This resource deficit is often cited by researchers as a limiting factor in their research.

<div class="mw-heading mw-heading2"><h2 id="History">History</h2></div>

The term FPAA was first used in 1991 by Lee and Gulak.<a href="#cite_note-1_Lee_and_Gulak-3">[3]</a> They put forward the concept of CABs that are connected via a routing network and configured digitally. Subsequently, in 1992 and 1995<a href="#cite_note-3_Lee_and_Gulak-4">[4]</a> they further elaborated the concept with the inclusion of op-amps, capacitors, and resistors. This original chip was manufactured using 1.2 μm CMOS technology and operates in the 20 kHz range at a power consumption of 80 mW.

However, the concept of a user-definable analog array dates back 20 years earlier, to the mask-programmable analog "Monochip" invented by the designer of the famous 555 timer chip, Hans Camenzind, and his company Interdesign (later acquired by Ferranti in 1977). The Monochip was the basis for a pioneering line of chips for music synthesizers, sold by Curtis Electromusic (CEM). <a href="#cite_note-5">[5]</a><a href="#cite_note-6">[6]</a><a href="#cite_note-7">[7]</a><a href="#cite_note-8">[8]</a>

Pierzchala et al introduced a similar concept named electronically-programmable analog circuit (EPAC).<a href="#cite_note-4_Pierzchala-9">[9]</a> It featured only a single integrator. However, they proposed a local interconnect <a href="Network_architecture" title="Network architecture">architecture</a> in order to try to avoid the bandwidth limitations.

The reconfigurable analog signal processor (RASP) and a second version were introduced in 2002 by Hall et al.<a href="#cite_note-6_Hall-10">[10]</a><a href="#cite_note-7_Hall-11">[11]</a> Their design incorporated high-level elements such as second order <a href="Band-pass_filter" title="Band-pass filter">bandpass filters</a> and 4 by 4 vector matrix multipliers into the CABs. Because of its architecture, it is limited to around 100 kHz and the chip itself is not able to support independent reconfiguration.

In 2004 Joachim Becker picked up the <a href="Parallel_connection" class="mw-redirect" title="Parallel connection">parallel connection</a> of OTAs (operational transconductance amplifiers) and proposed its use in a hexagonal local interconnection architecture.<a href="#cite_note-8_Becker-12">[12]</a> It did not require a routing network and eliminated switching the signal path that enhances the frequency response.

In 2005 Fabian Henrici worked with Joachim Becker to develop a switchable and invertible OTA which doubled the maximum FPAA bandwidth.<a href="#cite_note-9_Becker-13">[13]</a> This collaboration resulted in the first manufactured FPAA in a <a href="130_nanometer" class="mw-redirect" title="130 nanometer">0.13 μm</a> <a href="CMOS" title="CMOS">CMOS</a> technology.

In 2016 Dr. Jennifer Hasler from Georgia Tech designed a FPAA system on a chip that uses analog technology to achieve unprecedented power and size reductions.<a href="#cite_note-11_Hasler-14">[14]</a>

<ul><li><a href="Field-programmable_RF" title="Field-programmable RF">Field-programmable RF</a> – field programmable radio frequency devices</li>

<li><a href="Complex_programmable_logic_device" title="Complex programmable logic device">Complex programmable logic device (CPLD)</a></li>

<li><a href="PSoC" class="mw-redirect" title="PSoC">PSoC</a> – programmable system-on-chip</li>

<li><a href="Network_on_a_chip" title="Network on a chip">NoC</a> – network on a chip</li>

<li><a href="Network_architecture" title="Network architecture">Network architecture</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite id="CITEREFHallTwiggHasslerAnderson2004" class="citation book cs1">Hall, Tyson; Twigg, Christopher; Hassler, Paul; Anderson, David (2004). "Application performance of elements in a floating-gate FPAA". 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512). pp. 589–592. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FISCAS.2004.1329340">10.1109/ISCAS.2004.1329340</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-7803-8251-X</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:17212868">17212868</a>.</cite>

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<li id="cite_note-2"><a href="#cite_ref-2">^</a> <cite id="CITEREFBaskayaReddySungAnderson2006" class="citation journal cs1">Baskaya, F.; Reddy, S.; Sung, Kyu Lim; Anderson, D.V. (August 2006). <a rel="nofollow" class="external text" href="https://www.computer.org/csdl/trans/si/2006/08/01664910-abs.html">"Placement for large-scale floating-gate field-programable analog arrays"</a>. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 14 (8): 906–910. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FTVLSI.2006.878477">10.1109/TVLSI.2006.878477</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:16583629">16583629</a>.</cite>

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<li id="cite_note-1_Lee_and_Gulak-3"><a href="#cite_ref-1_Lee_and_Gulak_3-0">^</a> <cite id="CITEREFE._K._F._LeeP._G._Gulak1991" class="citation journal cs1">E. K. F. Lee; P. G. Gulak (December 1991). "A CMOS Field-programmable analog array". IEEE Journal of Solid-State Circuits. 26 (12): 1860–1867. <a href="Bibcode_(identifier)" class="mw-redirect" title="Bibcode (identifier)">Bibcode</a>:<a rel="nofollow" class="external text" href="https://ui.adsabs.harvard.edu/abs/1991IJSSC..26.1860L">1991IJSSC..26.1860L</a>. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2F4.104162">10.1109/4.104162</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:5323561">5323561</a>.</cite>

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<li id="cite_note-3_Lee_and_Gulak-4"><a href="#cite_ref-3_Lee_and_Gulak_4-0">^</a> <cite id="CITEREFLeeGulak1995" class="citation book cs1">Lee, E.K.F.; Gulak, P.G. (1995). "A transconductor-based field-programmable analog array". Proceedings ISSCC '95 - International Solid-State Circuits Conference. pp. 198–199. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FISSCC.1995.535521">10.1109/ISSCC.1995.535521</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-7803-2495-1</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:56613166">56613166</a>.</cite>

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<li id="cite_note-5"><a href="#cite_ref-5">^</a> <cite id="CITEREFmatrix" class="citation web cs1">matrix. <a rel="nofollow" class="external text" href="https://www.matrixsynth.com/2008/06/pictures-of-dead-cem-chips.html">"Pictures of dead CEM chips"</a>. Retrieved 2025-03-27.</cite>

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<li id="cite_note-6"><a href="#cite_ref-6">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://sdiy.info/wiki/Interdesign,_Inc.">"Interdesign, Inc"</a>. Synth DIY Wiki. 2017-05-03. Retrieved 2025-03-27.</cite>

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<li id="cite_note-7"><a href="#cite_ref-7">^</a> <cite id="CITEREFtluong2012" class="citation web cs1">tluong (2012-09-21). <a rel="nofollow" class="external text" href="https://computerhistory.org/blog/hans-camenzind-remembering-a-wizard-of-analog/?key=hans-camenzind-remembering-a-wizard-of-analog">"Hans Camenzind: Remembering a "Wizard of Analog""</a>. CHM. Retrieved 2025-03-27.</cite>

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<li id="cite_note-8"><a href="#cite_ref-8">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.curtiselectromusic.com/">"Home"</a>. Curtis Electromusic. Retrieved 2025-03-27.</cite>

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<li id="cite_note-4_Pierzchala-9"><a href="#cite_ref-4_Pierzchala_9-0">^</a> <cite id="CITEREFPierzchalaPerkowskiVan_HalenSchaumann1995" class="citation book cs1">Pierzchala, E.; Perkowski, M.A.; Van Halen, P.; Schaumann, R. (1995). "Current-mode amplifier/Integrator for a field-programmable analog array". Proceedings ISSCC '95 - International Solid-State Circuits Conference. pp. 196–197. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FISSCC.1995.535520">10.1109/ISSCC.1995.535520</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-7803-2495-1</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:60724962">60724962</a>.</cite>

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<li id="cite_note-6_Hall-10"><a href="#cite_ref-6_Hall_10-0">^</a> <cite id="CITEREFHallHaslerAnderson2002" class="citation book cs1">Hall, Tyson S.; Hasler, Paul; Anderson, David V. (2002). "Field-Programmable Analog Arrays: A Floating—Gate Approach". <a rel="nofollow" class="external text" href="http://uilis.unsyiah.ac.id/opentheses/items/show/3084">Field Programmable Analog Arrays: A Floating-Gate Approach</a>. Lecture Notes in Computer Science. Vol. 2438. pp. 424–433. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1007%2F3-540-46117-5_45">10.1007/3-540-46117-5_45</a>. <a href="Hdl_(identifier)" class="mw-redirect" title="Hdl (identifier)">hdl</a>:<a rel="nofollow" class="external text" href="https://hdl.handle.net/1853%2F5071">1853/5071</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-3-540-44108-3</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:596774">596774</a>.</cite>

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<li id="cite_note-7_Hall-11"><a href="#cite_ref-7_Hall_11-0">^</a> <cite id="CITEREFHallTwiggGrayHasler2005" class="citation journal cs1">Hall, T.S.; Twigg, C.M.; Gray, J.D.; Hasler, P.; Anderson, D.V. (2005). "Large scale field programmable analog arrays for analog signal processing". IEEE Transactions on Circuits and Systems I: Regular Papers. 52 (11): 2298–2307. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FTCSI.2005.853401">10.1109/TCSI.2005.853401</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:1148361">1148361</a>.</cite>

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<li id="cite_note-8_Becker-12"><a href="#cite_ref-8_Becker_12-0">^</a> <cite class="citation citeseerx cs1">"A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells". <a href="CiteSeerX_(identifier)" class="mw-redirect" title="CiteSeerX (identifier)">CiteSeerX</a> <a rel="nofollow" class="external text" href="https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.444.8748">10.1.1.444.8748</a>.</cite>

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<li id="cite_note-9_Becker-13"><a href="#cite_ref-9_Becker_13-0">^</a> <cite class="citation citeseerx cs1">"A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13 μm CMOS with 186MHz GBW". <a href="CiteSeerX_(identifier)" class="mw-redirect" title="CiteSeerX (identifier)">CiteSeerX</a> <a rel="nofollow" class="external text" href="https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.444.8748">10.1.1.444.8748</a>.</cite>

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<li id="cite_note-11_Hasler-14"><a href="#cite_ref-11_Hasler_14-0">^</a> <cite id="CITEREFSuma_GeorgeSihwan_KimSahil_ShahJennifer_Hasler2016" class="citation journal cs1">Suma George; Sihwan Kim; Sahil Shah; Jennifer Hasler; Michelle Collins; Farhan Adil; Richard Wunderlich; Stephen Nease; Shubha Ramakrishnan (June 2016). "A Programmable and Configurable Mixed-Mode FPAA SoC". IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24 (6): 2253–2261. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FTVLSI.2015.2504119">10.1109/TVLSI.2015.2504119</a>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a> <a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:14027246">14027246</a>.</cite>

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<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><a rel="nofollow" class="external text" href="http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=205916545">"Analog's Answer to FPGA Opens Field to Masses"</a> Sunny Bains, EE Times, February 21, 2008. Issue 1510.</li>

<li><a rel="nofollow" class="external text" href="http://opencircuitdesign.com/~tim/research/fpaa/fpaa.html">"Field programmable analog arrays"</a> Tim Edwards, <a href="Johns_Hopkins_University" title="Johns Hopkins University">Johns Hopkins University</a> project, 1999.</li>

<li><a rel="nofollow" class="external text" href="https://www.imtek.de/professuren/mikroelektronik/forschung/low-power-mixed">"Field programmable analog arrays"</a> Joachim Becker, et al., <a href="University_of_Freiburg" title="University of Freiburg">University of Freiburg</a>, Department of Microsystems Engineering. Hex FPAA Research Project.</li>

<li><a rel="nofollow" class="external autonumber" href="https://www.anadigm.com/fpaa.asp">[1]</a> Field programmable analog arrays (FPAAs) from Anadigm</li>

<li><a rel="nofollow" class="external text" href="http://hasler.ece.gatech.edu/">"Integrated Computational Electronics (ICE) Laboratory"</a> <a href="Georgia_Institute_of_Technology" class="mw-redirect" title="Georgia Institute of Technology">Georgia Institute of Technology</a> Project</li></ul></div><div><div class="zim-footer">

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